Beyond i9–10900K! AMD Ryzen 5000 series processor Zen 3 architecture analysis
For a long time in the past, AMD has been unable to lead Intel in the single-core performance of desktop processors. It can only rely on packing more cores in a single processor package and setting a lower price to compete with rivals in the market. Fighting each other, but AMD has reversed this situation through Ryzen 5000 series processors, let us take a look at the changes in Zen 3 architecture.
Redesign the overall architecture
AMD declared in 2017 that they would provide the best desktop processors in the world (We wanted to deliver the best desktop processors in the world and change the industry along the way.). Now they use the Zen 3 architecture Ryzen 5000 series processors have achieved this goal. Through performance measurements, we have seen that the performance of Ryzen 9 5900X can indeed surpass its main competitor Intel Core i9–10900K.
Following AMD’s previous Zen and Zen 2 architectures, Zen 3 is a ground-up Redesign processor architecture, including enhanced front-end, execution engine, access, SoC architecture and other parts have been improved, and Brings significant performance and function improvements.
The goal of strengthening the front-end is to increase the prefetching performance of large programs with a large number of branches, especially in large programs with a large number of branches, double the buffer of L1 branch prediction to 1024, and increase the channel width of the branch predictor , Increase the response speed of prediction errors, improve the sequential prefetch performance, and make the granularity of switching cache pipelines finer.
In the execution engine part, the design goal of the new architecture is to shorten the delay and increase the architecture to improve the ability of Instruction-Level Parallelism (ILP). In the integer data fetcher, integer window, floating point channel width, floating point The points multiplying and accumulating calculations and other parts are also optimized and performance improved.
The goal of the improvement in access is to expand the architecture and strengthen the prefetching capability to meet the larger data throughput required by the execution engine. The clock frequency for data reading and writing is increased compared to Zen 2.
Break the CCX barrier
Another major improvement of Zen 3 is to improve the SoC architecture. The goal is also to reduce latency, while reducing the latency of processor core to core, core to Cache, main memory and other data access, and to increase the L3Cache cluster. 1 times.
In the design of Zen 2 architecture, a single processor package can accommodate up to 2 sets of CCD (Compute Die) and 1 set of IOD (Input/Output Die), and each set of CCD can accommodate up to 2 sets CCX (Core Complexes), and each group of CCX can hold up to 4 processor cores. For example, two sets of CCX with four processor cores can be used to form a set of CCDs to achieve an 8-core processor configuration.
Zen 3 increases the number of cores that CCX can accommodate to 8, and each CCD can only accommodate 1 set of CCX. Therefore, an 8-core processor will have a CCX with 8 processor cores to form a CCD.
The biggest advantage of this is that the original architecture that can only accommodate 4 cores per cluster can be changed to accommodate 8 cores, and the original 2 groups of 16MB L3 Cache memories can be combined into a 32MB configuration.
This can shorten the communication delay between the processor cores. For example, in the Zen 2 architecture, if processor cores located in different CCXs need to communicate, a core needs to transmit data to the IOD through the Infinity Fabric, and then the IOD exchanges the data. To the other core, the performance will be affected due to the transmission delay. If the processor core is located in the same CCX, there is no such problem.
On the other hand, a unified 32MB L3 Cache memory is also more efficient than splitting into two groups of 16MB, and can hold a larger amount of data, which helps to improve game performance.
In terms of process, Zen 3’s CCD uses the same TSMC 7nm node process as Zen 2, and inherits the design improvements incorporated in the Ryzen 3000XT series processors, so it can once again push the highest clock. IOD fully extends the previous 12nm process and design, and makes the processor compatible with the previously launched 500 and 400 series chip sets.
On the whole, the “historical positioning” of the Ryzen 5000 series processors lies in the single-core performance of super Intel flagship products, and still maintains the advantage of more cores, so regardless of the performance of single-core or multi-core programs can catch up or surpass Intel ( It is also necessary to consider the performance impact caused by optimization factors such as software, compiler, instruction set, etc.), in games, e-sports, art design, video editing, computer-aided manufacturing (CAM), computer-aided design (CAD) and other applications Can bring performance advantages.
It is a pity that Ryzen 5000 series processors are more than 50 dollars more expensive than Ryzen 3000XT of the same level (for example, Ryzen 5 5600X compared with Ryzen 5 3600XT). Such a pricing strategy can certainly be explained as the new processor brings greater performance. Improve, but still contradict consumer expectations.
What’s interesting is that after AMD announced the news of Ryzen5000 series processors, Intel was not to be outdone, and fought back with RocketLake-S processors, accidentally squeezing toothpaste too hard. For consumers, this kind of competition. It can often make the product’s performance and price more affordable, and perhaps both parties will continue to get closer to market demand in the future to get consumers’ favor.